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DAC
2005
ACM
15 years 6 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
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DAC
2005
ACM
15 years 6 months ago
Efficient and accurate gate sizing with piecewise convex delay models
We present an efficient and accurate gate sizing tool that employs a novel piecewise convex delay model, handling both rise and fall delays, for static CMOS gates. The delay model...
Hiran Tennakoon, Carl Sechen
ERSHOV
2006
Springer
15 years 6 months ago
Well-Structured Model Checking of Multiagent Systems
Abstract. We address model checking problem for combination of Computation Tree Logic (CTL) and Propositional Logic of Knowledge (PLK) in finite systems with the perfect recall syn...
Nikolay V. Shilov, Natalya Olegovna Garanina
COCOON
2008
Springer
15 years 6 months ago
Average-Case Competitive Analyses for One-Way Trading
Consider a trader who exchanges one dollar into yen and assume that the exchange rate fluctuates within the interval [m, M]. The game ends without advance notice, then the trader ...
Hiroshi Fujiwara, Kazuo Iwama, Yoshiyuki Sekiguchi
DCOSS
2008
Springer
15 years 5 months ago
Distributed Activity Recognition with Fuzzy-Enabled Wireless Sensor Networks
Wireless sensor nodes can act as distributed detectors for recognizing activities online, with the final goal of assisting the users in their working environment. We propose an act...
Mihai Marin-Perianu, Clemens Lombriser, Oliver Amf...
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