Sciweavers

13841 search results - page 2182 / 2769
» Algorithms and Constraint Programming
Sort
View
194
Voted
ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
16 years 4 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
16 years 4 months ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
FPGA
2010
ACM
276views FPGA» more  FPGA 2010»
16 years 4 months ago
Accelerating Monte Carlo based SSTA using FPGA
Monte Carlo based SSTA serves as the golden standard against alternative SSTA algorithms, but it is seldom used in practice due to its high computation time. In this paper, we acc...
Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, K...
CVPR
2010
IEEE
16 years 3 months ago
Specular Surface Reconstruction from Sparse Reflection Correspondences
We present a practical approach for surface reconstruction of smooth mirror-like objects using sparse reflection correspondences (RCs). Assuming finite object motion with a fix...
Aswin Sankaranarayanan, Ashok Veeraraghavan, Oncel...
IUI
2010
ACM
16 years 2 months ago
Lowering the barriers to website testing with CoTester
In this paper, we present CoTester, a system designed to decrease the difficulty of testing web applications. CoTester allows testers to create test scripts that are represented ...
Jalal Mahmud, Tessa Lau
« Prev « First page 2182 / 2769 Last » Next »