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VLSID
2007
IEEE
153views VLSI» more  VLSID 2007»
16 years 7 months ago
Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
Zhaohui Fu, Sharad Malik
VLSID
2007
IEEE
209views VLSI» more  VLSID 2007»
16 years 7 months ago
Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
Saraju P. Mohanty, Elias Kougianos
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
16 years 7 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
VLDB
2007
ACM
91views Database» more  VLDB 2007»
16 years 7 months ago
On Dominating Your Neighborhood Profitably
Recent research on skyline queries has attracted much interest in the database and data mining community. Given a database, an object belongs to the skyline if it cannot be domina...
Cuiping Li, Anthony K. H. Tung, Wen Jin, Martin Es...
258
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SIGMOD
2008
ACM
65views Database» more  SIGMOD 2008»
16 years 7 months ago
Generating targeted queries for database testing
Tools for generating test queries for databases do not explicitly take into account the actual data in the database. As a consequence, such tools cannot guarantee suitable coverag...
Chaitanya Mishra, Nick Koudas, Calisto Zuzarte
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