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ISHPC
2003
Springer
15 years 8 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
GLVLSI
2010
IEEE
136views VLSI» more  GLVLSI 2010»
15 years 8 months ago
Thermal-aware compilation for system-on-chip processing architectures
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
Mohamed M. Sabry, José L. Ayala, David Atie...
DATE
2002
IEEE
104views Hardware» more  DATE 2002»
15 years 8 months ago
Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
Luca Benini, Davide Bruni, Alberto Macii, Enrico M...
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
15 years 8 months ago
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
Qin Zhao, Bart Mesman, Twan Basten
DSN
2002
IEEE
15 years 8 months ago
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
Markus Jochim
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