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DATE
2006
IEEE
84views Hardware» more  DATE 2006»
15 years 11 months ago
Vulnerability analysis of L2 cache elements to single event upsets
Memory elements are the most vulnerable system component to soft errors. Since memory elements in cache arrays consume a large fraction of the die in modern microprocessors, the p...
Hossein Asadi, Vilas Sridharan, Mehdi Baradaran Ta...
DATE
2006
IEEE
171views Hardware» more  DATE 2006»
15 years 11 months ago
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Jongsun Park, Jung Hwan Choi, Kaushik Roy
IJCNN
2006
IEEE
15 years 11 months ago
Sparse Bayesian Models: Bankruptcy-Predictors of Choice?
Abstract— Making inferences and choosing appropriate responses based on incomplete, uncertainty and noisy data is challenging in financial settings particularly in bankruptcy de...
Bernardete Ribeiro, Armando Vieira, João Ca...
178
Voted
IPPS
2006
IEEE
15 years 11 months ago
Exploiting processing locality through paging configurations in multitasked reconfigurable systems
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
T. Taher, Tarek A. El-Ghazawi
ISCAS
2006
IEEE
145views Hardware» more  ISCAS 2006»
15 years 11 months ago
The wordlength determination problem of linear time invariant systems with multiple outputs - a geometric programming approach
This paper proposes two new methods for optimizing objectives and constraints. The GP approach is very general and hardware resources in finite wordlength implementation of it allo...
S. C. Chan, K. M. Tsui
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