Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Abstract. Until now, the great majority of research in low-power systems has assumed a convex power model. However, recently, due to the confluence of emerging technological and ar...
Ani Nahapetian, Foad Dabiri, Miodrag Potkonjak, Ma...
Due to the limited energy supplies of nodes in many applications like wireless sensor networks, energy efficiency is crucial for extending the lifetime of these networks. This pape...
In this paper, we present Chameleon—an application-level power management approach for reducing energy consumption in mobile processors. Our approach exports the entire responsi...
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...