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CODES
2005
IEEE
14 years 11 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
PATMOS
2007
Springer
15 years 4 months ago
Optimization for Real-Time Systems with Non-convex Power Versus Speed Models
Abstract. Until now, the great majority of research in low-power systems has assumed a convex power model. However, recently, due to the confluence of emerging technological and ar...
Ani Nahapetian, Foad Dabiri, Miodrag Potkonjak, Ma...
GLOBECOM
2009
IEEE
14 years 7 months ago
Energy-Efficient Space-Time Coded Cooperative Routing in Multihop Wireless Networks
Due to the limited energy supplies of nodes in many applications like wireless sensor networks, energy efficiency is crucial for extending the lifetime of these networks. This pape...
Behrouz Maham, Ravi Narasimhan, Are Hjørung...
MM
2005
ACM
157views Multimedia» more  MM 2005»
15 years 3 months ago
Chameleon: application level power management with performance isolation
In this paper, we present Chameleon—an application-level power management approach for reducing energy consumption in mobile processors. Our approach exports the entire responsi...
Xiaotao Liu, Prashant J. Shenoy, Mark D. Corner
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
15 years 3 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram