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» Algorithms for Parity Games
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DATE
2009
IEEE
170views Hardware» more  DATE 2009»
15 years 6 months ago
A novel LDPC decoder for DVB-S2 IP
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...
Stefan Müller 0004, Manuel Schreger, Marten K...
DFT
2007
IEEE
101views VLSI» more  DFT 2007»
15 years 5 months ago
Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits
Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, vari...
Francesco Regazzoni, Thomas Eisenbarth, Johann Gro...
GECCO
2005
Springer
196views Optimization» more  GECCO 2005»
15 years 4 months ago
Providing information from the environment for growing electronic circuits through polymorphic gates
This paper deals with the evolutionary design of programs (constructors) that are able to create (n+2)-input circuits from n-input circuits. The growing circuits are composed of p...
Michal Bidlo, Lukás Sekanina
ARC
2007
Springer
152views Hardware» more  ARC 2007»
14 years 11 months ago
Statistical signal processing approaches to fault detection
: The parity space approach to fault detection and isolation (FDI) has been developed during the last twenty years, and the focus here is to describe its application to stochastic ...
Fredrik Gustafsson
CORR
2006
Springer
105views Education» more  CORR 2006»
14 years 11 months ago
A Combinatorial Family of Near Regular LDPC Codes
Abstract-- An elementary combinatorial Tanner graph construction for a family of near-regular low density parity check (LDPC) codes achieving high girth is presented. These codes a...
K. Murali Krishnan, Rajdeep Singh, L. Sunil Chandr...