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HPCC
2007
Springer
15 years 6 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to ef...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai
3DPVT
2006
IEEE
162views Visualization» more  3DPVT 2006»
15 years 5 months ago
How Far Can We Go with Local Optimization in Real-Time Stereo Matching
Applications such as robot navigation and augmented reality require high-accuracy dense disparity maps in real-time and online. Due to time constraint, most realtime stereo applic...
Liang Wang, Mingwei Gong, Minglun Gong, Ruigang Ya...
DATE
2006
IEEE
195views Hardware» more  DATE 2006»
15 years 5 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
15 years 5 months ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
GLOBECOM
2006
IEEE
15 years 5 months ago
Implementation of a Coded Modulation for Deep Space Optical Communications
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
Michael K. Cheng, Bruce E. Moision, Jon Hamkins, M...