Sciweavers

804 search results - page 122 / 161
» Algorithms for Programmers
Sort
View
ICCAD
1998
IEEE
76views Hardware» more  ICCAD 1998»
15 years 4 months ago
Functional debugging of systems-on-chip
Due to the exponential growth of both design complexity and the number of gates per pin, functional debugging has emerged as a critical step in the development of a system-on-chip...
Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
15 years 4 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
SIGSOFT
1993
ACM
15 years 3 months ago
Scalable Software Libraries
1 Many software libraries (e.g., the Booch C++ Components, libg++, NIHCL, COOL) provide components (classes) that implement data structures. Each component is written by hand and r...
Don S. Batory, Vivek Singhal, Marty Sirkin, Jeff T...
CAV
2010
Springer
239views Hardware» more  CAV 2010»
15 years 3 months ago
Model Checking of Linearizability of Concurrent List Implementations
Abstract. Concurrent data structures with fine-grained synchronization are notoriously difficult to implement correctly. The difficulty of reasoning about these implementations do...
Pavol Cerný, Arjun Radhakrishna, Damien Zuf...
CHES
2004
Springer
106views Cryptology» more  CHES 2004»
15 years 3 months ago
XTR Implementation on Reconfigurable Hardware
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
Eric Peeters, Michael Neve, Mathieu Ciet