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ERSA
2009
387views Hardware» more  ERSA 2009»
14 years 9 months ago
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices
Abstract-- The paper presents the implementation of nonlinear least-squares regression in a Field Programmable Gate Array (FPGA) device. The implemented algorithm is very performan...
Andrea Abba, Antonio Manenti, Andrea Suardi, Angel...
ERSA
2006
105views Hardware» more  ERSA 2006»
15 years 1 months ago
A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture
In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purp...
Yuanqing Guo, Cornelis Hoede, Gerard J. M. Smit
ICIP
2006
IEEE
16 years 1 months ago
An FPGA-Based Implementation of Spatio-Temporal Object Segmentation
This paper proposes a robust real-time, scalable and modular Field Programmable Gate Array (FPGA) based implementation of a spatiotemporal segmentation of video objects. The goal ...
Kumara Ratnayake, Aishy Amer
86
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ADBIS
2001
Springer
112views Database» more  ADBIS 2001»
15 years 4 months ago
Detecting Termination of Active Database Rules Using Symbolic Model Checking
One potential problem of active database applications is the non-termination of rules. Although algorithms have been proposed to detect non-termination, almost all provide a conser...
Indrakshi Ray, Indrajit Ray
FPL
2005
Springer
100views Hardware» more  FPL 2005»
15 years 5 months ago
HAIL: A Hardware-Accelerated Algorithm for Language Identification
A hardware-accelerated algorithm has been designed to automatically identify the primary languages used in documents transferred over the Internet. The algorithm has been implemen...
Charles M. Kastner, G. Adam Covington, Andrew A. L...