Sciweavers

804 search results - page 23 / 161
» Algorithms for Programmers
Sort
View
IPPS
2006
IEEE
15 years 10 months ago
Reconfigurable communications for image processing applications
: This work tries to reuse programmable communication resources like a Network-on-Chip (NoC) in the acceleration of image applications. We show a mathematical model for the computa...
André Borin Soares, Luigi Carro, Altamiro A...
PLDI
2005
ACM
15 years 10 months ago
Programming by sketching for bit-streaming programs
This paper introduces the concept of programming with sketches, an approach for the rapid development of high-performance applications. This approach allows a programmer to write ...
Armando Solar-Lezama, Rodric M. Rabbah, Rastislav ...
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
15 years 9 months ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki
EH
2000
IEEE
183views Hardware» more  EH 2000»
15 years 9 months ago
A Reconfigurable Platform for the Automatic Synthesis of Analog Circuits
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
Ricardo Salem Zebulum, Cristina Costa Santini, Hel...
129
Voted
VR
2007
IEEE
191views Virtual Reality» more  VR 2007»
15 years 11 months ago
A GPU Sub-pixel Algorithm for Autostereoscopic Virtual Reality
Autostereoscopic displays enable unencumbered immersive virtual reality, but at a significant computational expense. This expense impacts the feasibility of autostereo displays in...
Robert Kooima, Tom Peterka, Javier Girado, Jinghua...