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IPPS
2006
IEEE
15 years 8 months ago
Making lockless synchronization fast: performance implications of memory reclamation
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...
ITC
2003
IEEE
176views Hardware» more  ITC 2003»
15 years 7 months ago
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects
ct This paper describes a general technique to test external memory/caches and memory interconnects using on-chip logic. Such a test methodology is expected to significantly reduc...
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumda...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
15 years 8 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 7 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
AUIC
2005
IEEE
15 years 8 months ago
Hand Tracking For Low Powered Mobile AR User Interfaces
Mobile augmented reality systems use general purpose computing hardware to perform tasks such as rendering computer graphics, providing video overlay, and performing vision tracki...
Ross Smith, Wayne Piekarski, Grant B. Wigley