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GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
CHI
2009
ACM
16 years 3 months ago
Attaching UI enhancements to websites with end users
We present reform, a system that envisions roles for both programmers and end users in enhancing existing websites to support new goals. First, programmers author a traditional ma...
Michael Toomim, Steven M. Drucker, Mira Dontcheva,...
106
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ICFP
2005
ACM
16 years 2 months ago
Combining programming with theorem proving
Applied Type System (ATS) is recently proposed as a framework for designing and formalizing (advanced) type systems in support of practical programming. In ATS, the definition of ...
Chiyan Chen, Hongwei Xi
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
15 years 11 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
DATE
2009
IEEE
170views Hardware» more  DATE 2009»
15 years 9 months ago
A novel LDPC decoder for DVB-S2 IP
Abstract—In this paper a programmable Forward Error Correction (FEC) IP for a DVB-S2 receiver is presented. It is composed of a Low-Density Parity Check (LDPC), a Bose-ChaudhuriH...
Stefan Müller 0004, Manuel Schreger, Marten K...