Sciweavers

224 search results - page 16 / 45
» Algorithms for Solving Boolean Satisfiability in Combination...
Sort
View
DAC
2004
ACM
16 years 21 days ago
Refining the SAT decision ordering for bounded model checking
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio So...
AAAI
1997
15 years 1 months ago
Using CSP Look-Back Techniques to Solve Real-World SAT Instances
We report on the performance of an enhanced version of the “Davis-Putnam” (DP) proof procedure for propositional satisfiability (SAT) on large instances derived from realworld...
Roberto J. Bayardo Jr., Robert Schrag
MEMOCODE
2007
IEEE
15 years 6 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
CAV
2000
Springer
187views Hardware» more  CAV 2000»
15 years 3 months ago
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
In this paper we show how to do symbolic model checking using Boolean Expression Diagrams (BEDs), a non-canonical representation for Boolean formulas, instead of Binary Decision Di...
Poul Frederick Williams, Armin Biere, Edmund M. Cl...
TCAD
2002
121views more  TCAD 2002»
14 years 11 months ago
Robust Boolean reasoning for equivalence checking and functional property verification
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
Andreas Kuehlmann, Viresh Paruthi, Florian Krohm, ...