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ICCAD
2001
IEEE
144views Hardware» more  ICCAD 2001»
16 years 19 days ago
Faster SAT and Smaller BDDs via Common Function Structure
The increasing popularity of SAT and BDD techniques in verification and synthesis encourages the search for additional speed-ups. Since typical SAT and BDD algorithms are exponent...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
128
Voted
CSR
2010
Springer
15 years 7 months ago
A SAT Based Effective Algorithm for the Directed Hamiltonian Cycle Problem
Abstract. The Hamiltonian cycle problem (HCP) is an important combinatorial problem with applications in many areas. While thorough theoretical and experimental analyses have been ...
Gerold Jäger, Weixiong Zhang
123
Voted
AHS
2006
IEEE
138views Hardware» more  AHS 2006»
15 years 9 months ago
Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit configuration is under the control of an evolutionary algorithm. Evolvable hardware has sh...
Emanuele Stomeo, Tatiana Kalganova, Cyrille Lamber...
CAV
2004
Springer
151views Hardware» more  CAV 2004»
15 years 7 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
134
Voted
ISLPED
2010
ACM
158views Hardware» more  ISLPED 2010»
15 years 4 months ago
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach
The ongoing scaling of semiconductor technology is causing severe increase of on-chip power density and temperature in microprocessors. This has raised urgent requirement for both...
Weixun Wang, Xiaoke Qin, Prabhat Mishra