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» Algorithms for Solving Boolean Satisfiability in Combination...
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104
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FROCOS
2005
Springer
15 years 9 months ago
Combination of Isabelle/HOL with Automatic Tools
We describe results and status of a sub project of the Verisoft [1] project. While the Verisoft project aims at verification of a complete computer system starting with hardware a...
Sergey Tverdyshev
140
Voted
ICCAD
1995
IEEE
127views Hardware» more  ICCAD 1995»
15 years 7 months ago
Hybrid decision diagrams
Abstract: Functions that map boolean vectors into the integers are important for the design and veri cation of arithmetic circuits. MTBDDs and BMDs have been proposed for represent...
Edmund M. Clarke, Masahiro Fujita, Xudong Zhao
GLVLSI
2007
IEEE
187views VLSI» more  GLVLSI 2007»
15 years 10 months ago
DAG based library-free technology mapping
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P...
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
16 years 4 months ago
Estimation of Maximum Power-Up Current
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
Fei Li, Lei He, Kewal K. Saluja
111
Voted
COCOON
2009
Springer
15 years 10 months ago
A Fast Algorithm for Computing a Nearly Equitable Edge Coloring with Balanced Conditions
We discuss the nearly equitable edge coloring problem on a multigraph and propose an efficient algorithm for solving the problem, which has a better time complexity than the previ...
Akiyoshi Shioura, Mutsunori Yagiura