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AGENTS
1999
Springer
15 years 8 months ago
Planning and Resource Allocation for Hard Real-Time, Fault-Tolerant Plan Execution
We describe the interface between a real-time resource allocation system with an AI planner in order to create fault-tolerant plans that are guaranteed to execute in hard real-tim...
Ella M. Atkins, Tarek F. Abdelzaher, Kang G. Shin,...
IPPS
1999
IEEE
15 years 8 months ago
Parallel Biological Sequence Comparison Using Prefix Computations
We present practical parallel algorithms using prefix computations for various problems that arise in pairwise comparison of biological sequences. We consider both constant and af...
Srinivas Aluru, Natsuhiko Futamura, Kishan Mehrotr...
VLSID
1999
IEEE
91views VLSI» more  VLSID 1999»
15 years 8 months ago
Timed Circuit Synthesis Using Implicit Methods
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
Robert Thacker, Wendy Belluomini, Chris J. Myers
AADEBUG
1997
Springer
15 years 8 months ago
Bisection Debugging
This paper introduces the bisection debugging model. The key idea is to use a debugger to identify the semantic differences between two versions of the same program. The debugger ...
Thomas R. Gross
SIGMOD
1994
ACM
91views Database» more  SIGMOD 1994»
15 years 8 months ago
Estimating Page Fetches for Index Scans with Finite LRU Buffers
We describe an algorithm for estimating the number of page fetches for a partial or complete scan of a B-tree index. The algorithm obtains estimates for the number of page fetches ...
Arun N. Swami, K. Bernhard Schiefer