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» Allocator implementations for network-on-chip routers
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MOBISYS
2005
ACM
15 years 9 months ago
An overlay MAC layer for 802.11 networks
The widespread availability of 802.11-based hardware has made it the premier choice of both researchers and practitioners for developing new wireless networks and applications. Ho...
Ananth Rao, Ion Stoica
ISCA
2008
IEEE
114views Hardware» more  ISCA 2008»
15 years 4 months ago
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
Jae W. Lee, Man Cheuk Ng, Krste Asanovic
64
Voted
NDSS
2008
IEEE
15 years 4 months ago
A Tune-up for Tor: Improving Security and Performance in the Tor Network
The Tor anonymous communication network uses selfreported bandwidth values to select routers for building tunnels. Since tunnels are allocated in proportion to this bandwidth, thi...
Robin Snader, Nikita Borisov
ANCS
2005
ACM
15 years 3 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...
69
Voted
SIGCOMM
2009
ACM
15 years 4 months ago
Design of a network service processing platform for data path customization
Custom packet processing functionality in routers is one of the key characteristics of next-generation Internet architectures. Network services have been proposed as an abstractio...
Qiang Wu, Tilman Wolf