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» Alternative Test Methods Using IEEE 1149.4
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113
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GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
15 years 10 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar
ICPR
2000
IEEE
15 years 9 months ago
Human Silhouette Recognition with Fourier Descriptors
A novel approach for human silhouette recognition is presented. The method is based on Fourier descriptors. We made an analysis of which and how many descriptors are enough to hav...
Rocío Díaz de León, Luis Enri...
143
Voted
FGR
1998
IEEE
208views Biometrics» more  FGR 1998»
15 years 8 months ago
Locating Facial Region of a Head-and-Shoulders Color Image
This paper addresses our proposed method to automatically locate the person's face from a given image that consists of a head-and-shoulders view of the person and a complex b...
Douglas Chai, King N. Ngan
ACSC
2004
IEEE
15 years 8 months ago
Strength Reduction for Loop-Invariant Types
Types are fundamental for enforcing levels of abstraction in modern high-level programming languages and their lower-level representations. However, some type-related features suc...
Phung Hua Nguyen, Jingling Xue
CBMS
2001
IEEE
15 years 8 months ago
Statistically Optimized Biopsy Strategy for the Diagnosis of Prostate Cancer
This paper presents a method for optimizing prostate needle biopsy, by creating a statistical atlas of the spatial distribution of prostate cancer from a large patient cohort. In ...
Dinggang Shen, Zhiqiang Lao, Edward Herskovits, Ga...