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» AmpNet - A Highly Available Cluster Interconnection Network
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HPCA
2009
IEEE
15 years 10 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
IPPS
2006
IEEE
15 years 3 months ago
Performance evaluation of wormhole routed network processor-memory interconnects
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
Taskin Koçak, Jacob Engel
DSN
2006
IEEE
15 years 3 months ago
High Throughput Total Order Broadcast for Cluster Environments
Total order broadcast is a fundamental communication primitive that plays a central role in bringing cheap software-based high availability to a wide array of services. This paper...
Rachid Guerraoui, Ron R. Levy, Bastian Pochon, Viv...
PCRCW
1997
Springer
15 years 1 months ago
Power/Performance Trade-offs for Direct Networks
High performance portable and space-borne systems continue to demand increasing computation speeds while concurrently attempting to satisfy size, weight, and power constraints. As...
Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchil...
HPCA
2009
IEEE
15 years 10 months ago
Express Cube Topologies for on-Chip Interconnects
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...