339 search results - page 53 / 68 » An ADC-BiST scheme using sequential code analysis |
CODES
2006
IEEE
15 years 5 months ago
2006
IEEE
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
104
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CJ
2006
14 years 11 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
100
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GLOBECOM
2008
IEEE
15 years 6 months ago
2008
IEEE
Abstract—Consider a communications system where the detector generates a mix of hard and soft outputs, which are then fed into a soft-input channel decoder. In such a setting, it...
101
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ICIP
2008
IEEE
16 years 1 months ago
2008
IEEE
In this paper, we consider compensation of focus mismatches for frames that are encoded with inter-view bi-prediction (B-frames) in multiview coding (MVC). We start with an analys...
101
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ICIP
2002
IEEE
16 years 1 months ago
2002
IEEE
In this paper, we propose an efficient low complexity compression scheme for densely sampled irregular 3D meshes. This scheme is based on 3D multiresolution analysis (3D Discrete ...