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» An ASIP design methodology for embedded systems
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CSREAESA
2003
15 years 2 months ago
Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
Friedhelm Stappert, Carsten Rust
CODES
2001
IEEE
15 years 5 months ago
Hardware/software partitioning of embedded system in OCAPI-xl
The implementation of embedded networked appliances requires a mix of processor cores and HW accelerators on a single chip. When designing such complex and heterogeneous SoCs, the...
Geert Vanmeerbeeck, Patrick Schaumont, Serge Verna...
LCTRTS
2001
Springer
15 years 5 months ago
Embedded Control Systems Development with Giotto
Giotto is a principled, tool-supported design methodology for implementing embedded control systems on platforms of possibly distributed sensors, actuators, CPUs, and networks. Gio...
Thomas A. Henzinger, Benjamin Horowitz, Christoph ...
DATE
2002
IEEE
137views Hardware» more  DATE 2002»
15 years 6 months ago
The Modelling of Embedded Systems Using HASoC
We present a design method (HASoC) for the lifecycle modelling of embedded systems that are targeted primarily, but not necessarily, at SoC implementations. The object-oriented de...
M. D. Edwards, P. N. Green
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
15 years 5 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan