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» An ASIP design methodology for embedded systems
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ASAP
2007
IEEE
153views Hardware» more  ASAP 2007»
14 years 12 months ago
Performance Evaluation of Adaptive Routing Algorithms for achieving Fault Tolerance in NoC Fabrics
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...
Haibo Zhu, Partha Pratim Pande, Cristian Grecu
SMA
2003
ACM
100views Solid Modeling» more  SMA 2003»
15 years 5 months ago
Free-form deformations via sketching and manipulating scalar fields
This paper presents a novel Scalar-field based Free-Form Deformation (SFFD) technique founded upon general flow constraints and implicit functions. In contrast to the traditiona...
Jing Hua, Hong Qin
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
15 years 6 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
HYBRID
2010
Springer
15 years 1 months ago
Receding horizon control for temporal logic specifications
In this paper, we describe a receding horizon scheme that satisfies a class of linear temporal logic specifications sufficient to describe a wide range of properties including saf...
Tichakorn Wongpiromsarn, Ufuk Topcu, Richard M. Mu...
RTSS
2009
IEEE
15 years 6 months ago
Multiprocessor Extensions to Real-Time Calculus
Abstract—Many embedded platforms consist of a heterogeneous collection of processing elements, memory modules, and communication subsystems. These components often implement diff...
Hennadiy Leontyev, Samarjit Chakraborty, James H. ...