304 search results - page 2 / 61 » An Access Timing Measurement Unit of Embedded Memory |
HPCA
2000
IEEE
15 years 1 months ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
RTAS
2010
IEEE
14 years 7 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
TC
2008
14 years 9 months ago
2008
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
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ASPLOS
2006
ACM
15 years 3 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...