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» An Access Timing Measurement Unit of Embedded Memory
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ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
15 years 3 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
87
Voted
RTSS
2007
IEEE
15 years 3 months ago
I/O-Aware Deadline Miss Ratio Management in Real-Time Embedded Databases
Recently, cheap and large capacity non-volatile memory such as flash memory is rapidly replacing disks not only in embedded systems, but also in high performance servers. Unlike ...
Woochul Kang, Sang Hyuk Son, John A. Stankovic, Me...
80
Voted
EMSOFT
2009
Springer
15 years 2 months ago
Serving embedded content via web applications: model, design and experimentation
Embedded systems such as smart cards or sensors are now widespread, but are often closed systems, only accessed via dedicated terminals. A new trend consists in embedding Web serv...
Simon Duquennoy, Gilles Grimaud, Jean-Jacques Vand...
DAC
2000
ACM
15 years 10 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
CASES
2006
ACM
15 years 3 months ago
Automated compile-time and run-time techniques to increase usable memory in MMU-less embedded systems
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...
Lan S. Bai, Lei Yang, Robert P. Dick