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» An Advanced Optimizer for the IA-64 Architecture
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ISLPED
2005
ACM
108views Hardware» more  ISLPED 2005»
15 years 3 months ago
Replacing global wires with an on-chip network: a power analysis
This paper explores the power implications of replacing global chip wires with an on-chip network. We optimize network links by varying repeater spacing, link pipelining, and volt...
Seongmoo Heo, Krste Asanovic
DAC
2007
ACM
15 years 11 months ago
Placement of 3D ICs with Thermal and Interlayer Via Considerations
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
Brent Goplen, Sachin S. Sapatnekar
HPCA
2003
IEEE
15 years 10 months ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston
SIGMOD
2004
ACM
122views Database» more  SIGMOD 2004»
15 years 10 months ago
Adapting to Source Properties in Processing Data Integration Queries
An effective query optimizer finds a query plan that exploits the characteristics of the source data. In data integration, little is known in advance about sources' propertie...
Zachary G. Ives, Alon Y. Halevy, Daniel S. Weld
INFOCOM
2007
IEEE
15 years 4 months ago
Algorithmic Aspects of Access Networks Design in B3G/4G Cellular Networks
— The forthcoming 4G cellular systems will provide broadband wireless access to a variety of advanced data and voice services. In order to do that, these networks will have a sig...
David Amzallag, Joseph Naor, Danny Raz