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» An Advanced Optimizer for the IA-64 Architecture
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HPCA
2008
IEEE
15 years 10 months ago
Roughness of microarchitectural design topologies and its implications for optimization
Recent advances in statistical inference and machine learning close the divide between simulation and classical optimization, thereby enabling more rigorous and robust microarchit...
Benjamin C. Lee, David M. Brooks
IJSNET
2011
110views more  IJSNET 2011»
14 years 4 months ago
Sensor integration for perinatology research
— The numbers of high-risk pregnancies and premature births are increasing due to the steadily higher age at which women get pregnant. The long-term quality of life of the neonat...
Wei Chen, Jun Hu, Sibrecht Bouwstra, Sidarto Bamba...
DAC
2010
ACM
14 years 10 months ago
Parallel hierarchical cross entropy optimization for on-chip decap budgeting
Decoupling capacitor (decap) placement has been widely adopted as an effective way to suppress dynamic power supply noise. Traditional decap budgeting algorithms usually explore t...
Xueqian Zhao, Yonghe Guo, Zhuo Feng, Shiyan Hu
EMSOFT
2001
Springer
15 years 2 months ago
Compiler Optimizations for Adaptive EPIC Processors
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
Krishna V. Palem, Surendranath Talla, Weng-Fai Won...
DATE
2006
IEEE
140views Hardware» more  DATE 2006»
15 years 4 months ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...