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» An Algorithm for Bi-Decomposition of Logic Functions
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TCAD
2008
112views more  TCAD 2008»
14 years 9 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
TCS
1998
14 years 9 months ago
Foundations of Aggregation Constraints
We introduce a new constraint domain, aggregation constraints, that is useful in database query languages, and in constraint logic programming languages that incorporate aggregate...
Kenneth A. Ross, Divesh Srivastava, Peter J. Stuck...
IJES
2006
110views more  IJES 2006»
14 years 9 months ago
Partitioning bin-packing algorithms for distributed real-time systems
Embedded real-time systems must satisfy not only logical functional requirements but also para-functional properties such as timeliness, Quality of Service (QoS) and reliability. W...
Dionisio de Niz, Raj Rajkumar
PLDI
2011
ACM
14 years 14 days ago
Evaluating value-graph translation validation for LLVM
Translation validators are static analyzers that attempt to verify that program transformations preserve semantics. Normalizing translation validators do so by trying to match the...
Jean-Baptiste Tristan, Paul Govereau, Greg Morrise...
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
15 years 3 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon