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» An Algorithm for Bi-Decomposition of Logic Functions
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MEMOCODE
2007
IEEE
15 years 3 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
DAWAK
2000
Springer
15 years 2 months ago
Applying Vertical Fragmentation Techniques in Logical Design of Multidimensional Databases
In the context of multidimensional databases implemented on relational DBMSs through star schemes, the most effective technique to enhance performances consists of materializing re...
Matteo Golfarelli, Dario Maio, Stefano Rizzi
TABLEAUX
2000
Springer
15 years 1 months ago
Benchmark Analysis with FaCT
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
Ian Horrocks
DATE
2006
IEEE
133views Hardware» more  DATE 2006»
15 years 3 months ago
Analysis and synthesis of quantum circuits by using quantum decision diagrams
Quantum information processing technology is in its pioneering stage and no proficient method for synthesizing quantum circuits has been introduced so far. This paper introduces a...
Afshin Abdollahi, Massoud Pedram
ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Fast synthesis of exact minimal reversible circuits using group theory
- We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory p...
Guowu Yang, Xiaoyu Song, William N. N. Hung, Marek...