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» An Algorithm for Bi-Decomposition of Logic Functions
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INFOCOM
2010
IEEE
14 years 8 months ago
Reliability in Layered Networks with Random Link Failures
—We consider network reliability in layered networks where the lower layer experiences random link failures. In layered networks, each failure at the lower layer may lead to mult...
Kayi Lee, Hyang-Won Lee, Eytan Modiano
TVLSI
2010
14 years 4 months ago
LOPASS: A Low-Power Architectural Synthesis System for FPGAs With Interconnect Estimation and Optimization
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
Deming Chen, Jason Cong, Yiping Fan, Lu Wan
ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
15 years 1 months ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
TPHOL
2003
IEEE
15 years 2 months ago
Inductive Invariants for Nested Recursion
Abstract. We show that certain input-output relations, termed inductive invariants are of central importance for termination proofs of algorithms defined by nested recursion. Indu...
Sava Krstic, John Matthews
JAR
2008
105views more  JAR 2008»
14 years 9 months ago
Proof Synthesis and Reflection for Linear Arithmetic
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...
Amine Chaieb, Tobias Nipkow