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» An Algorithm for Bi-Decomposition of Logic Functions
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ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
15 years 11 months ago
Temporal floorplanning using 3D-subTCG
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we use a novel topo...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-...
CAV
2004
Springer
108views Hardware» more  CAV 2004»
15 years 11 months ago
DPLL( T): Fast Decision Procedures
The logic of equality with uninterpreted functions (EUF) and its extensions have been widely applied to processor verification, by means of a large variety of progressively more s...
Harald Ganzinger, George Hagen, Robert Nieuwenhuis...
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
15 years 9 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
FINTAL
2006
15 years 9 months ago
Morphological Lexicon Extraction from Raw Text Data
The tool extract enables the automatic extraction of lemma-paradigm pairs from raw text data. The tool uses search patterns that consist of regular expressions and propositional lo...
Markus Forsberg, Harald Hammarström, Aarne Ra...
ICWN
2004
15 years 7 months ago
Demand-Driven Clustering in MANETs
Abstract-- Many clustering protocols for mobile ad hoc networks (MANETs) have been proposed in the literature. With only one exception so far [1], all these protocols are proactive...
Curt Cramer, Oliver Stanze, Kilian Weniger, Martin...