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» An Algorithm for Bi-Decomposition of Logic Functions
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DAC
2002
ACM
16 years 6 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu
POPL
2006
ACM
16 years 5 months ago
Polymorphic regular tree types and patterns
We propose a type system based on regular tree grammars, where algebraic datatypes are interpreted in a structural way. Thus, the same constructors can be reused for different typ...
Jerome Vouillon
EPIA
2009
Springer
16 years 2 days ago
An ILP System for Learning Head Output Connected Predicates
Inductive Logic Programming (ILP) [1] systems are general purpose learners that have had significant success on solving a number of relational problems, particularly from the biol...
José Carlos Almeida Santos, Alireza Tamaddo...
FSTTCS
2009
Springer
16 years 2 days ago
Modelchecking counting properties of 1-safe nets with buffers in paraPSPACE
ABSTRACT. We consider concurrent systems that can be modelled as 1-safe Petri nets communicating through a fixed set of buffers (modelled as unbounded places). We identify a param...
M. Praveen, Kamal Lodaya
VTS
2007
IEEE
143views Hardware» more  VTS 2007»
15 years 11 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang