As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
As statistical machine learning algorithms and techniques continue to mature, many researchers and developers see statistical machine learning not only as a topic of expert study,...
Kayur Patel, James Fogarty, James A. Landay, Bever...
Network topology discovery for the large IP networks is a very well studied area of research. Most of the previous work focus on improving the efficiency in terms of time and compl...
—We propose novel discrete cosine transform (DCT) pseudophase techniques to estimate shift/delay between two onedimensional (1-D) signals directly from their DCT coefficients by...
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...