1594 search results - page 279 / 319 » An Algorithm to Compute Collusion Paths |
DAC
2004
ACM
16 years 23 days ago
2004
ACM
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
DAC
2006
ACM
16 years 23 days ago
2006
ACM
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
VLSID
2007
IEEE
16 years 5 days ago
2007
IEEE
Boolean Satisfiability is seeing increasing use as a decision procedure in Electronic Design Automation (EDA) and other domains. Most applications encode their domain specific cons...
VLSID
2002
IEEE
16 years 5 days ago
2002
IEEE
In floorplan design, it is common that a designer will want to control the positions of some modules in the final packing for various purposes like data path alignment, I/O connec...
ICDE
2010
IEEE
15 years 11 months ago
2010
IEEE
A fundamental problem in XML query processing is tree pattern query (TPQ) matching which computes all data instances in an XML database that match an input TPQ. There is a lot of r...