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CP
2009
Springer
15 years 10 months ago
Constraint-Based Optimal Testing Using DNNF Graphs
The goal of testing is to distinguish between a number of hypotheses about a systemfor example, dierent diagnoses of faults by applying input patterns and verifying or falsifying t...
Anika Schumann, Martin Sachenbacher, Jinbo Huang
VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
15 years 10 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
OSDI
2008
ACM
15 years 10 months ago
Improving MapReduce Performance in Heterogeneous Environments
MapReduce is emerging as an important programming model for large-scale data-parallel applications such as web indexing, data mining, and scientific simulation. Hadoop is an open-...
Matei Zaharia, Andy Konwinski, Anthony D. Joseph, ...
DCC
2008
IEEE
15 years 9 months ago
Server Placement in Multiple-Description-Based Media Streaming
Multiple description coding (MDC) has emerged as a powerful technique for reliable real-time communications over lossy packet networks. In its basic form, it involves encoding a me...
Satyajeet Ahuja, Marwan Krunz
ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
15 years 6 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He