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CASES
2010
ACM
14 years 8 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
PROCEDIA
2011
14 years 25 days ago
10x10: A General-purpose Architectural Approach to Heterogeneity and Energy Efficiency
Two decades of microprocessor architecture driven by quantitative 90/10 optimization has delivered an extraordinary 1000-fold improvement in microprocessor performance, enabled by...
Andrew A. Chien, Allan Snavely, Mark Gahagan
JPDC
2006
146views more  JPDC 2006»
14 years 10 months ago
A semi-static approach to mapping dynamic iterative tasks onto heterogeneous computing systems
Minimization of the execution time of an iterative application in a heterogeneous parallel computing environment requires an appropriate mapping scheme for matching and scheduling...
Yu-Kwong Kwok, Anthony A. Maciejewski, Howard Jay ...
PDP
2009
IEEE
15 years 4 months ago
Modelling the Internet Delay Space Based on Geographical Locations
Existing approaches for modelling the Internet delay space predict end-to-end delays between two arbitrary hosts as static values. Further, they do not capture the characteristics...
Sebastian Kaune, Konstantin Pussep, Christof Leng,...
ICAC
2008
IEEE
15 years 4 months ago
Power and Performance Management of Virtualized Computing Environments Via Lookahead Control
— There is growing incentive to reduce the power consumed by large-scale data centers that host online services such as banking, retail commerce, and gaming. Virtualization is a ...
Dara Kusic, Jeffrey O. Kephart, James E. Hanson, N...