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FCCM
2008
IEEE
115views VLSI» more  FCCM 2008»
15 years 10 months ago
Simultaneous Retiming and Placement for Pipelined Netlists
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
Kenneth Eguro, Scott Hauck
ECRTS
2003
IEEE
15 years 9 months ago
Error-Driven QoS Management in Imprecise Real-Time Databases
In applications such as web-applications, e-commerce, and engine control, the demand for real-time data services has increased. In these applications, requests have to be processe...
Mehdi Amirijoo, Jörgen Hansson, Sang Hyuk Son
DATE
2000
IEEE
90views Hardware» more  DATE 2000»
15 years 8 months ago
Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
Jörg Henkel, Tony Givargis, Frank Vahid
ARCS
2012
Springer
13 years 12 months ago
Fast Scenario-Based Design Space Exploration using Feature Selection
: This paper presents a novel approach to efficiently perform early system level design space exploration (DSE) of MultiProcessor System-on-Chip (MPSoC) based embedded systems. By...
Peter van Stralen, Andy D. Pimentel
ICANN
2005
Springer
15 years 9 months ago
Neural Network Classifers in Arrears Management
Abstract. The literature suggests that an ensemble of classifiers outperforms a single classifier across a range of classification problems. This paper investigates the applicat...
Esther Scheurmann, Chris Matthews