Sciweavers

3281 search results - page 141 / 657
» An Approach to use Executable Models for Testing
Sort
View
ITC
2003
IEEE
93views Hardware» more  ITC 2003»
15 years 8 months ago
Hybrid Multisite Testing at Manufacturing
This paper deals with Hybrid multisite testing of VLSI chips by utilizing automatic test equipment (ATE) in connection with built-in self-test (BIST). The performance of a multisi...
Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lomb...
RAID
2005
Springer
15 years 8 months ago
Environment-Sensitive Intrusion Detection
We perform host-based intrusion detection by constructing a model from a program’s binary code and then restricting the program’s execution by the model. We improve the effecti...
Jonathon T. Giffin, David Dagon, Somesh Jha, Wenke...
FORMATS
2009
Springer
15 years 9 months ago
Exploiting Timed Automata for Conformance Testing of Power Measurements
For software development, testing is still the primary choice for investigating the correctness of a system. Automated testing is of utmost importance to support continuous integra...
Matthias Woehrle, Kai Lampka, Lothar Thiele
ENTCS
2008
144views more  ENTCS 2008»
15 years 2 months ago
Platform Independent Timing of Java Virtual Machine Bytecode Instructions
The accurate measurement of the execution time of Java bytecode is one factor that is important in order to estimate the total execution time of a Java application running on a Ja...
Jonathan M. Lambert, James F. Power
ETS
2007
IEEE
109views Hardware» more  ETS 2007»
15 years 9 months ago
Test Configurations for Diagnosing Faulty Links in NoC Switches
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
Jaan Raik, Raimund Ubar, Vineeth Govind