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» An Architectural Style for Multiple Real-Time Data Feeds
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DCC
2007
IEEE
14 years 5 months ago
Algorithms and Hardware Structures for Unobtrusive Real-Time Compression of Instruction and Data Address Traces
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...
Milena Milenkovic, Aleksandar Milenkovic, Martin B...
MSS
2000
IEEE
160views Hardware» more  MSS 2000»
13 years 10 months ago
Implementation of a Fault-Tolerant Real-Time Network-Attached Storage Device
Phoenix is a fault-tolerantreal-time network-attachedstorage device (NASD). Like other NASD architectures, Phoenix provides an object-based interface to data stored on network-att...
Ashish Raniwala, Srikant Sharma, Anindya Neogi, Tz...
ICCS
2007
Springer
14 years 12 days ago
Towards Real-Time Distributed Signal Modeling for Brain-Machine Interfaces
New architectures for Brain-Machine Interface communication and control use mixture models for expanding rehabilitation capabilities of disabled patients. Here we present and test ...
Jack DiGiovanna, Loris Marchal, Prapaporn Rattanat...
DATE
1998
IEEE
108views Hardware» more  DATE 1998»
13 years 10 months ago
Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin...
DELTA
2006
IEEE
13 years 10 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor