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» An Architecture for Adaptive Algorithmic Hybrids
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PVLDB
2011
14 years 9 days ago
Merging What's Cracked, Cracking What's Merged: Adaptive Indexing in Main-Memory Column-Stores
Adaptive indexing is characterized by the partial creation and refinement of the index as side effects of query execution. Dynamic or shifting workloads may benefit from prelimi...
Stratos Idreos, Stefan Manegold, Harumi A. Kuno, G...
ISQED
2002
IEEE
83views Hardware» more  ISQED 2002»
15 years 2 months ago
A Hybrid BIST Architecture and Its Optimization for SoC Testing
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
CIBCB
2007
IEEE
15 years 1 months ago
Hybrid Architecture for Accelerating DNA Codeword Library Searching
-- A large and reliable DNA codeword library is the key to the success of DNA based computing. Searching for the set of reliable DNA codewords is an NP-hard problem, which can take...
Qinru Qiu, Daniel J. Burns, Qing Wu, Prakash Mukre
94
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ASAP
2000
IEEE
184views Hardware» more  ASAP 2000»
15 years 1 months ago
Tradeoff Analysis and Architecture Design of a Hybrid Hardware/Software Sorter
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
Marcus Bednara, Oliver Beyer, Jürgen Teich, R...
CODES
2008
IEEE
15 years 4 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...