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DAC
2004
ACM
15 years 6 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
IPPS
1998
IEEE
15 years 5 months ago
Airshed Pollution Modeling: A Case Study in Application Development in an HPF Environment
In this paper, we describe our experience with developing Airshed, a large pollution modeling application, in the Fx programming environment. We demonstrate that high level parall...
Jaspal Subhlok, Peter Steenkiste, James M. Stichno...
ASPDAC
2012
ACM
241views Hardware» more  ASPDAC 2012»
13 years 9 months ago
Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems
Abstract— Integrating optical interconnects into the nextgeneration multi-/many-core architecture has been considered a viable solution to addressing the limitations in throughpu...
Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amir...
VLSID
2005
IEEE
170views VLSI» more  VLSID 2005»
15 years 7 months ago
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
Biranchinath Sahu, Gabriel A. Rincón-Mora
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
15 years 6 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...