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DAC
2006
ACM
16 years 20 days ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
JUCS
2006
112views more  JUCS 2006»
14 years 11 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
INFOVIS
2003
IEEE
15 years 5 months ago
Exploring High-D Spaces with Multiform Matrices and Small Multiples
We introduce an approach to visual analysis of multivariate data that integrates several methods from information visualization, exploratory data analysis (EDA), and geovisualizat...
Alan M. MacEachren, Xiping Dai, Frank Hardisty, Di...
ISORC
2000
IEEE
15 years 4 months ago
Hierarchical Feedback Adaptation for Real Time Sensor-Based Distributed Applications
This paper presents an innovative hierarchical feedback adaptation method that efficiently controls the dynamic QoS behavior of real-time distributed data-flow applications, such ...
Mihaela Cardei, Ionut Cardei, Rakesh Jha, Allalagh...
WSC
1998
15 years 1 months ago
Applying Temporal Databases to HLA Data Collection and Analysis
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...
Thom McLean, Leo Mark, Margaret L. Loper, David Ro...