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IISWC
2008
IEEE
15 years 6 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
ATAL
2009
Springer
15 years 6 months ago
Genius: negotiation environment for heterogeneous agents
In this demo, we present GENIUS, a tool that facilitates research in the area of bilateral multi-issue negotiation. It implements an open architecture allowing easy development an...
Koen V. Hindriks, Catholijn M. Jonker, Sarit Kraus...
IPPS
2000
IEEE
15 years 4 months ago
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
Diana Hecht, Constantine Katsinis
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
15 years 1 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....
CIDR
2003
109views Algorithms» more  CIDR 2003»
15 years 1 months ago
SkyQuery: A Web Service Approach to Federate Databases
Traditional science searched for new objects and phenomena that led to discoveries. Tomorrow's science will combine together the large pool of information in scientific archi...
Tanu Malik, Alexander S. Szalay, Tamas Budavari, A...