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» An Architecture for Exploring Large Design Spaces
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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
14 years 12 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
DAC
2008
ACM
15 years 11 months ago
Multiprocessor performance estimation using hybrid simulation
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
ICDAR
2011
IEEE
13 years 9 months ago
A Digital Ink Recogntion Server for Handwritten Japanese Text
— This paper describes the design and implementation of a digital ink recognition server for handwritten Japanese text. Currently, fast and accurate recognition of online handwri...
Daqing Wang, Bilan Zhu, Masaki Nakagawa
EMSOFT
2001
Springer
15 years 2 months ago
Some Synchronization Issues When Designing Embedded Systems from Components
Abstract This paper is sort of a confession. Issues of synchrony, asynchrony, and synchronization, arise frequently in designing embedded systems from components, like everyone I k...
Albert Benveniste
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
15 years 4 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...