Sciweavers

1269 search results - page 175 / 254
» An Architecture for Parallel Topic Models
Sort
View
139
Voted
WSC
2004
15 years 4 months ago
Improving the Performance of Dispatching Rules in Semiconductor Manufacturing by Iterative Simulation
In this paper, we consider semiconductor manufacturing processes that can be characterized by a diverse product mix, heterogeneous parallel machines, sequence-dependent setup time...
Lars Mönch, Jens Zimmermann
PRESENCE
2010
76views more  PRESENCE 2010»
14 years 10 months ago
Modularity for Large Virtual Reality Applications
This paper focuses on the design of high performance VR applications. These applications usually involve various I/O devices and complex simulations. A parallel architecture or gri...
Jérémie Allard, Jean-Denis Lesage, B...
209
Voted
ISCA
2011
IEEE
486views Hardware» more  ISCA 2011»
14 years 7 months ago
Dark silicon and the end of multicore scaling
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
Hadi Esmaeilzadeh, Emily R. Blem, Renée St....
LCN
2002
IEEE
15 years 8 months ago
A Comparative Throughput Analysis of Scalable Coherent Interface and Myrinet
It has become increasingly popular to construct large parallel computers by connecting many inexpensive nodes built with commercial-off-the-shelf (COTS) parts. These clusters can ...
Sarp Millich, Alan D. George, Sarp Oral
SPAA
2010
ACM
15 years 8 months ago
Brief announcement: byzantine agreement with homonyms
In this work, we address Byzantine agreement in a message passing system with homonyms, i.e. a system with a number l of authenticated identities that is independent of the total ...
Carole Delporte-Gallet, Hugues Fauconnier, Rachid ...