1269 search results - page 183 / 254 » An Architecture for Parallel Topic Models |
106
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EUROPAR
2009
Springer
15 years 3 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
84
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CCGRID
2001
IEEE
15 years 3 months ago
2001
IEEE
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of high performance of VIA, the previous MPI implementati...
TOG
2008
14 years 11 months ago
2008
We present an algorithm for constructing kd-trees on GPUs. This algorithm achieves real-time performance by exploiting the GPU's streaming architecture at all stages of kd-tr...
IEEEPACT
2009
IEEE
14 years 9 months ago
2009
IEEE
Abstract--Chip-MultiProcessor (CMP) architectures are becoming more and more popular as an alternative to the traditional processors that only extract instruction-level parallelism...
141
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HPDC
2011
IEEE
14 years 3 months ago
2011
IEEE
We investigate proactive dynamic load balancing on multicore systems, in which threads are continually migrated to reduce the impact of processor/thread mismatches to enhance the ...