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» An Automated Approach to Increasing the Robustness of C Libr...
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81
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DAC
2007
ACM
16 years 18 days ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu
115
Voted
DT
2006
180views more  DT 2006»
14 years 11 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...
91
Voted
IMSCCS
2006
IEEE
15 years 5 months ago
Degenerated Primer Design to Amplify the Heavy Chain Variable Region from Immunoglobulin cDNA
Background: The amplification of variable regions of immunoglobulins has become a major challenge in the cloning of antibody genes, whether from hybridoma cell lines or splenic B ...
Wang Ying, Chen Wei, Li Xu, Cheng Bing
CODES
2006
IEEE
15 years 5 months ago
Layout aware design of mesh based NoC architectures
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
Krishnan Srinivasan, Karam S. Chatha
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 3 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...