Sciweavers

3 search results - page 1 / 1
» An Automated BIST Architecture for Testing and Diagnosing FP...
Sort
View
ET
2006
154views more  ET 2006»
14 years 10 months ago
An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults
We present an efficient built-in self-test (BIST) architecture for testing and diagnosing stuck-at faults, delay faults, and bridging faults in FPGA interconnect resources. The BIS...
Jack Smith, Tian Xia, Charles E. Stroud
TCAD
2002
134views more  TCAD 2002»
14 years 9 months ago
Testing and diagnosis of interconnect faults in cluster-based FPGA architectures
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
Ian G. Harris, Russell Tessier
DAC
2004
ACM
15 years 11 months ago
Efficient on-line testing of FPGAs with provable diagnosabilities
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
Vinay Verma, Shantanu Dutt, Vishal Suthar