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76
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DAC
2007
ACM
16 years 1 days ago
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs
In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
ICCAD
2010
IEEE
124views Hardware» more  ICCAD 2010»
14 years 9 months ago
Symbolic performance analysis of elastic systems
Elastic systems, either synchronous or asynchronous, can be optimized for the average-case performance when they have units with early evaluation or variable latency. The performan...
Marc Galceran Oms, Jordi Cortadella, Michael Kishi...
83
Voted
ICPP
2009
IEEE
15 years 5 months ago
Designing Efficient FTP Mechanisms for High Performance Data-Transfer over InfiniBand
Ping Lai, Hari Subramoni, Sundeep Narravula, Amith...
72
Voted
IROS
2006
IEEE
127views Robotics» more  IROS 2006»
15 years 5 months ago
Performance Optimization of All-Terrain Robots: A 2D Quasi-Static Tool
- The creation of a rover for a specific task requires designing and selecting the mechanical structure specifically for its mission. This can be done by modelling a chassis and ev...
Ambroise Krebs, Thomas Thueer, Stephane Michaud, R...
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 4 months ago
Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
The increasing amount of test data needed to test SOC (System-on-Chip) entails efficient design of the TAM (test access mechanism), which is used to transport test data inside the...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...