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ICPP
2009
IEEE
15 years 4 days ago
Employing Transactional Memory and Helper Threads to Speedup Dijkstra's Algorithm
In this paper we work on the parallelization of the inherently serial Dijkstra's algorithm on modern multicore platforms. Dijkstra's algorithm is a greedy algorithm that ...
Konstantinos Nikas, Nikos Anastopoulos, Georgios I...
IPPS
2002
IEEE
15 years 7 months ago
Parallel Out-of-Core Algorithm for Genome-Scale Enumeration of Metabolic Systemic Pathways
Systemic pathways-oriented approaches to analysis of metabolic networks are effective for small networks but are computationally infeasible for genome scale networks. Current comp...
Nagiza F. Samatova, Al Geist, George Ostrouchov, A...
108
Voted
ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 8 months ago
Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutation
— The fully parallel LDPC decoding architecture can achieve high decoding throughput, but it suffers from large hardware complexity caused by a large set of processing units and ...
In-Cheol Park, Se-Hyeon Kang
112
Voted
ICASSP
2008
IEEE
15 years 9 months ago
High-performance scheduling algorithm for partially parallel LDPC decoder
In this paper, we propose a new scheduling algorithm for the overlapped message passing decoding, which can be applied to general low-density parity check (LDPC) codes. The partia...
Cheng-Zhou Zhan, Xin-Yu Shih, An-Yeu Wu
213
Voted
SIGMOD
2007
ACM
190views Database» more  SIGMOD 2007»
16 years 2 months ago
Map-reduce-merge: simplified relational data processing on large clusters
Map-Reduce is a programming model that enables easy development of scalable parallel applications to process vast amounts of data on large clusters of commodity machines. Through ...
Hung-chih Yang, Ali Dasdan, Ruey-Lung Hsiao, Dougl...